![]() It is made up of capacitor and transistor which can hold either active or inactive state. If we consider byte addressable area for storing this status as some memory will be wasted.Įach DRAM memory chip consists of a storage location or memory cells. As need only bit addressable area to store this status. Bit addressable area mainly used to store bit variables from an application program, like device output status, such as LEDs or motors (ON and OFF) etc. They are designed from address 20H to 2FH. Bit addressable area is formed close to the register banks. This area has total 128 addresses starting from 00h to 07Fh which represent for data storage location. Bank Registers Bit Addressable Area:īit addressable area consists of bit-addressable registers that store or remove only 1-bit of data. Whenever stack memory organization is full, then the data stores in scratch pad area. The bank1, bank2, bank3 can be used as stack pointer area. These can be selected by using the values of PSW register (i,e ,RS1, RS0). ![]() The banks are divided into four different banks such as Įach bank consists 8-general purpose registers and has own address to categorize stored information. The banks contain various general purpose registers such as R0-R7, and all such registers are byte-addressable registers that store or remove only 1-byte of data.
0 Comments
Leave a Reply. |
AuthorWrite something about yourself. No need to be fancy, just an overview. ArchivesCategories |